Dillon Engineering
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Don't waste your valuable time and resources. Let Dillon Engineering pave the way to realize your complex algorithms in FPGAs and ASICs. We specialize in custom design services, with particular emphasis on FPGA and ASIC based DSP algorithms and high-bandwidth, real-time digital signal and image processing applications. Our internally-developed, state-of-the-art ParaCore Architect tool facilitates the design of parameterized IP Cores.

We also have a number of pre-designed IP Cores that we can quickly customize to address your unique applications. Consider us a cost-effective extension to your team. Use your expertise to design new algorithms and our expertise to implement them in digital logic. Speed your designs' time-to-market by leveraging our proven proficiency and capability.

Dillon Engineering has nearly 20 years experience delivering system and logic design solutions for the most demanding applications, serving customers large and small in a wide range of markets. Dillon Engineering has a wide selection of FFT IP to meet the needs of any application.
Highlights

read more › Dillon Engineering is an engineering firm specializing in DSP algorithms implemented in FPGAs and ASICs. Founded in 1989, Dillon Engineering, Inc., offers a wide variety of custom design services, with particular emphasis on FPGA-based digital signal processing (DSP) algorithms and high-bandwidth, real-time digital signal and image processing applications. We can take our clients' new product ideas from their initial concept, through design, prototype, and checkout, all the way to full-scale manufacturing.

read more › We specialize in custom design services, with particular emphasis on FPGA or ASIC based DSP algorithms and high-bandwidth, real-time digital signal and image processing applications. Our engineering force has strong experience in HPEC, embedded system-on-chip, and a variety of other applications. Dillon Engineering's clients range from large companies and organizations like BAE Systems, Raytheon Company and NASA to small groups working with truly advanced electronic designs. We enjoy working on highly challenging opportunities, large or small.

read more › Dillon Engineering (DE) is a growing consulting firm delivering excellent engineering solutions to clients ranging from small start-ups to Fortune 500 companies. In order to continue to provide these solutions and add to our capabilities, DE seeks the brightest and most motivated engineers available. The state-of-the-art projects we are involved in offer a steady stream of new technologies to learn and apply, so anyone joining our team can expect challenging and rewarding project experiences. Engineers at DE can expect to spend almost 100% of their time doing real engineering work.

read more › Nearly 20 years experience delivering solutions for a wide range of system and logic design applications. Whether FPGA or ASIC, rapid prototyping or end product development, cutting edge performance or microwatt power, Dillon Engineering provides design services for your application needs. The following is a categorized listing of our application areas of expertise. We are a world-class provider of custom FPGA and ASIC logic for digital signal processing (DSP) applications. Our internally developed logic design and modeling capabilities are ideal for realizing your high performance embedded computing (HPEC) solutions.

read more › Dillon Engineering provides design services to commercial, defense and research customers large and small. We understand how different industries operate and have the flexibility to work within any framework. We are equally capable integrating with customers using agile processes, spiral development, or strict waterfall processes, an important factor to consider when looking to add to your team. When time to market matters most, DE's nimble organization is on-line and lock step with your team. Our responsiveness supports iterative or experimental development cycles.

read more › Count on Dillon Engineering for all your FPGA and ASIC design services and consulting needs. We address some questions you may have before embarking on your design. Why hire a design services firm when there are so many IP cores out there that can do the job, many of them royalty-free? The short answer is that FPGA or ASIC designs are systems of smaller building blocks, and the key is in the design, understanding and integration of these blocks. It is unlikely that an entire system's needs can be satisfied by one IP core, or even in a collection of cores that seamlessly work together.

read more › It is never too early or too late to engage Dillon Engineering on your critical project timeline. Dillon's engineering force is ready to integrate with your team and use our services to assist or carry the ball in whatever capacity you require. From start to completion, your project can leverage our expertise at any crucial stage along the way. Refer to the following example project timeline. When your ideas, algorithms, or legacy systems are being envisioned as high performance end products, we can investigate feasibility, perform trade studies, and develop high-level architecture alternatives that will begin moving your ideas toward realization.

read more › World's fastest FFT/IFFT IP Cores with both fixed and floating point capabilities. Dillon Engineering has the most extensive supply of FFT/IFFT IP Cores for FPGA and ASIC to meet the needs of the most demanding applications. Review the information about our IP and feel free to contact us with any questions you may have. Dillon Engineering's Fast Fourier Transform (FFT) IP Cores have been developed using our state-of-the-art ParaCore Architect utility. The result is highly parameterized cores that can be quickly and easily tailored to meet the size, performance, and data processing needs of any application.

read more › Multimillion point FFT processing optimized for Xilinx Virtex-4, -5, -6 and -7 FPGAs with SRAM or DRAM external memory interfaces. Dillon Engineering's UltraLong FFT IP Core uses an efficient Fast Fourier Transform (FFT) algorithm to provide multimillion-point discrete transforms on data frames or continuous data streams. This structure utilizes state-of-the-art off-chip memory technology and N1- and N2-length pipelined radix-2 FFT engines with an additional rotation stage to perform N=N1xN2 transform lengths, from 1K to 64M points.

read more › The Parallel Butterfly FFT IP Core provides efficient continuous data FFT calculations at the rate of multiple points per clock cycle. A bank of parallel butterflies executes the FFT one rank at a time on multiple I/O streams. ParaCore Architect parametric-based core provides maximum adaptability and flexibility (see details on the FFT Parameters). Massively parallel butterfly architecture, from 1 butterfly up to the full logic capacity of the target device. Our FFT core is based on radix-2 reduction, which results in a very efficient implementation capable of any power-of-2 length FFT or IFFT (see also our FFT Datasheet or our Floating Point FFT Factsheet).

read more › Real-world processing such as LTE OFDM often require non power-of-2 or -4 FFT lengths for spacing into the desired frequency bin size, called mixed-radix FFTs. Block DiagramBlock diagram of a pipelined Mixed Radix-2/3/5 FFT, an example of one of the many Mixed Radix FFT architectures Dillon Engineering has available. In this single-stream pipelined structure, the superset supports a length of 52 * 35 * 28 = 1,555,200 points. The red dataflow line shows pipelined processing order of 360 points (51 * 32 * 23).

read more › The Pipelined FFT IP Core provides efficient continuous data FFT calculations at the rate of one point per clock cycle. Used in both FPGA and ASIC devices, and excellent for applications where low memory usage is desired. Can result in the least ASIC area usage because of low memory requirement for medium to long FFT lengths. We provide cores for Xilinx and Altera FPGAs (using inferred block RAM and their math IP cores for floating point applications), as well as provide ASIC-targeted or FPGA-to-ASIC roadmap cores (using SRAM wrappers and our own fixed or floating point math cores).

read more › Dillon Engineering's Pipelined Floating Point FFT IP Core uses a modular radix-2 Fast Fourier Transform (FFT) architecture to provide discrete transforms on data frames or continuous data streams, with sample rate up to the maximum clock frequency. This efficient structure employs a single butterfly and a single delay feedback path per rank for low localized memory usage. True IEEE-754 floating point data maintained throughout, supporting a large dynamic range of data without requiring complicated fixed-point analysis.

read more › Fast and efficient two-dimensional FFT core for image processing applications. Successful FPGA/ASIC implementation of two-dimensional FFTs (used in 2D image processing applications) requires deep understanding of the underlying 1D FFT algorithm, chip and memory architectures. Since each pixel of image data is effectively processed twice, the issues of throughput, scaling, resource usage, and memory interfacing all become intertwined when considering the optimal solution for the target chip architecture.

read more › Dillon Engineering has developed a number of extremely high-performance IP Cores that are available for license. These include our Floating Point Library and AES Encryption/Decryption. All of our IP Cores have been developed using our state-of-the-art ParaCore Architect utility. This results in highly parameterized IP cores that can be quickly and easily tailored to meet the size, performance, and data processing needs of any application. Please feel free to contact us with any IP Core questions or comments.

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